This one-day training will provide software developers the foundation needed for modernizing their code to take advantage of parallel architectures found in both the Intel ® Xeon ® processor and the Intel ®  Xeon Phil ™ coprocessor.  For more information please see this link.

This session will cover:

• An overview of parallel programming frameworks and optimization guidelines for multi-core CPUs (Intel ®  and Xeon ® and many core coprocessors (Intel ®  Xeon Phi ™)
• Discussions about three layers of parallelism:  SIMD, Threads, Cluster Environment
• Tips for quick porting/development of HPC software applications
• Real-life examples of code and optimization techniques
• Hardware solution and corresponding software implementations, APIs and framework

Agenda:

Space is limited and registration is required.  Please register below.